This application incorporates by reference Taiwan application Ser. No. 091108569, filed on Apr. 25, 2002.
1. Field of the Invention
The invention relates in general to a voltage regulator, and more particularly to a pulse width modulation (PWM) voltage regulator.
2. Description of Related Art
As more and more powerful and innovative portable electronic devices are being developed, the efficiency of the switching power converters for supplying power to the portable electronic devices becomes more significant. In order to improve the power converting efficiency, the pulse width modulation (PWM) power converter has been widely applied to various electronic products. Referring to FIG. 1, a conventional PWM voltage regulator is illustrated. Suppose a load terminal voltage Vt between a load terminal of the PWM voltage regulator and the ground has a voltage rating of 5V. When a reduced load is connected to the load terminal, the load terminal voltage Vt will increase slightly to 5.01 V, for example. In order to stabilize the load terminal voltage Vt to the voltage rating, a switching device, such as a transistor Q, can be used to adjust the input current fed to the load. After the effective value of the input current is reduced, the load terminal voltage Vt will be reduced to the voltage rating so as to achieve voltage regulation. In order to implement the foregoing function, the control circuit 100 can be connected to the load terminal and the transistor Q. The control circuit 100 has an error amplifier 110 for detecting an error between the load terminal voltage Vt and a reference voltage Vr, in which the reference voltage level Vr can be set to 5V, that is, the voltage rating at the load terminal. In addition, an error signal er with respect to this error is produced. The oscillator 130 can produce an oscillating signal at a constant frequency, such as a 200-KHz sawtooth signal. The oscillating signal is also fed into a modulation signal generator 120, such as a comparator. After the modulation signal generator 120 receives the error signal er and the oscillating signal, a modulation signal ms will be generated according to these two signals, and the modulation signal ms will be fed to a driving device 140. Then, the driving device 140 makes the conduction period for the transistor Q shorter according to the modulation signal ms. As a result, the effective value of the current flowing through the transistor Q will be reduced, and the load terminal voltage Vt will return to the voltage rating.
Referring to FIG. 2, a schematic diagram illustrates a relation among the error signal, the oscillating signal, and the modulation signal. The oscillating signal, for example, has a frequency of 200 KHz and a sawtooth waveform. The modulation signal generator 120 can convert the relation between the error signal er and the oscillating signal into the modulation signal ms. When the error signal er is greater than the oscillating signal, the modulation signal ms can be set to a high level. When the error signal er is less than the oscillating signal, the modulation signal ms can be set to a low level. Therefore, if the load terminal voltage level Vt is higher than the reference voltage level Vr, the error signal er is lowered, so that the modulation signal ms has a shorter duration at the high level. Since the driving device 140 is to drive the transistor Q based on the modulation signal ms, the conduction period for the transistor Q is shortened. As a result, the effective value of the current flowing into the load is reduced, and the load terminal voltage level Vt is reduced. Since this is a closed loop control, the load terminal voltage level Vt can be stabilized at the voltage rating, that is, Vr=Vt.
As described above, the modulation signal ms results from the comparison of the error signal er and the oscillating signal, and therefore the frequencies of the modulation signal ms and the oscillating signal are the same. Since the oscillating signal has a constant frequency and a sawtooth waveform, the modulation signal ms has a constant frequency also, but only the pulse width would vary as the load varies. In other words, no matter whether a light load or a heavy load is connected to the PWM regulator, the PWM regulator uses a signal at a constant frequency, whose pulse width may change with the load, to switch on and off the transistor Q. Since the power consumption for the light load is rather small, the conduction period for the transistor Q is relatively shorter and the power transmitted during the conduction period is less. However, while the PWM regulator operates at light load under the PWM mode, the transistor Q even has a switching rate of 200,000 times per second, if the oscillating signal is set to 200 KHz, for example. There is power loss when the transistor Q is switched on and off and as a result, the efficiency of the power conversion decreases significantly. In order to solve the issue of poor efficiency under the PWM mode at light load, a PWM/PFM dual mode converter has therefore been developed. The PWM/PFM dual mode converter enters the PWM mode at heavy load, but enters the pulse frequency modulation (PFM) mode at light load. The PFM uses a modulation signal with the same pulse width but a changeable frequency to drive the transistor Q, so that the efficiency of power conversion is improved. This manner can solve the problem of poor efficiency of the power conversion at light load. However, unwanted noise would occur due to vibration of the inductance and the voltage effect from the ceramic capacitor, when the operation mode is switched to the PFM mode at light load and the frequency of the modulation signal is within the range of about 20 Hz to 20 KHz. In this situation, it would cause an increase of the ripple voltage output due to the decrease of the working frequency.
Due to the foregoing reasons, how to improve the efficiency of power conversion with respect to the light load condition and further prevent the noise is then a very important issue to be solved.
It is therefore an objective of the invention to provide a voltage regulator with pulse width modulation in dual frequencies, so that the efficiency of power conversion can be effectively improved for the light load condition, and the occurrence of noise can be prevented also.
In accordance with the foregoing and other objectives of the invention, the invention provides a voltage regulator with pulse width modulation in dual frequencies, which is briefly described as follows.
The voltage regulator with pulse width modulation in dual frequencies takes the PWM voltage regulation mode using a different frequency according to the degree of loading effect on the voltage regulation. In order to determine the degree of loading effect, a heavy-load reference voltage and a light-load reference voltage can be predetermined. When the error signal is greater than the heavy-load reference voltage, the load is a heavy load and a modulation signal at a higher frequency, such as 200 KHz, is used to drive the transistor. Conversely, when the error signal is less than the light-load reference voltage, the load is a light load and a modulation signal at a lower frequency, such as 20 KHz, is used to drive the transistor. In this way, the efficiency of power conversion is improved.
The voltage regulator with pulse width modulation in dual frequencies includes a transistor switcher, an error amplifier, a dual frequency signal generator, a modulation signal generator, a load sensing device, an OR operator, an AND operator, and a driving device. The dual frequency signal generator is used for generating a high frequency signal and a low frequency signal. The modulation signal generator can receive the high frequency signal and the error signal and then can modulate the two signals into a modulation signal, in which the frequencies for the high frequency signal and the modulation signal are the same. On the other hand, the load sensing device can determine the effect of loading, that is, whether the load is light or heavy, according to the error signal. When the load is determined to be a heavy load, a selection signal is set to logic 1, for example. When the load is determined to be a light load, the selection signal is set to logic 0. After the OR operator performs an OR logic operation for the low frequency signal and the selection signal, an OR operation signal is outputted, in which the OR operation signal is at logic 1 under heavy load, and the OR operation signal is the same as the low frequency signal under light load.
The AND operator is used for performing an AND logic operation of the modulation signal and the OR operation signal, and outputting an AND operation signal to the driving device. The driving device can control the on and off states of the transistor according to the AND operation signal. Since the OR operation signal is at logic 1 under heavy load, the AND operation signal is identical to the modulation signal at high frequency. In addition, since the OR operation signal is equal to the low frequency signal under light load, the AND operation signal is identical to the modulation signal at low frequency.
In the practical applications, dual frequency signal generator can use a signal generator and a frequency divider to achieve the function. The signal generator, such as a high frequency signal generator, can generate the high frequency signal for use by the modulation signal generator, but also can provide the logic operators with a low frequency signal by dividing the high frequency signal with the frequency divider. It is certain that the design can also be implemented with a low frequency signal generator and a frequency multiplier, wherein the low frequency signal generator is used to generate a low frequency signal, and then the low frequency signal can be multiplied by a factor by the frequency multiplier.
The load sensing device can be implemented with a light-load sensing device, a heavy-load sensing device, and a frequency selector, in which the heavy-load sensing device can compare the error signal with the heavy-load reference voltage. If the error signal is greater than the heavy-load reference voltage, a heavy load signal is outputted to the frequency selector. Similarly, the light-load sensing device can compare the error signal with the light-load reference voltage. If the error signal is less than the light-load reference voltage, a light load signal is outputted to the frequency selector. In this manner, when the frequency selector receives the heavy load signal, the selection signal can be set to for example, logic 1, and when the frequency selector receives the light load signal, the selection signal can be set to logic 0. The frequency selector can be implemented with a latch circuit, such as an RS latch circuit, for example.